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Date: 23-10-2020
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Date: 21-10-2020
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Date: 17-10-2020
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Voltage Amplification
The graph in Fig. 1 shows the drain (channel) current, ID as a function of the gate bias voltage EG for a hypothetical n-channel JFET when no signal is applied to the gate electrode. The drain voltage ED is assumed to be constant. When EG is fairly large and negative, the JFET is pinched off, and no current flows through the channel. As EG gets less negative, the channel opens up, and current begins flowing. As EG gets still less negative, the channel gets wider, and the current ID increases. As EG approaches the point where the source-gate (S-G) junction is at forward breakover, the channel conducts as well as it possibly can. If EG becomes positive enough so that the S-G junction conducts, the JFET no longer works properly. Some of the current in the channel is shunted through the gate. This is like a garden hose springing a leak.
The best amplification for weak signals is obtained when EG is such that the slope of the curve in Fig. 1 is steepest. This is shown roughly by the range marked X in the graph. For power amplification, results are often best when the JFET is biased at or beyond pinchoff, in the range marked Y.
Fig. 1. Relative drain current as a function of gate voltage in a hypothetical n-channel JFET.
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